FinFET (Fin field-effect-transistor) is an emerging technology, which allows smaller and higher performance devices. FinFET structures comprise narrow isolated bars of silicon (fins) with a gate(s) on the sides of the fin. Prior art FinFET structures are formed on silicon-on-insulator (SOI) substrates. However, FinFETs fabricated on SOI substrates suffer from floating body effects. The floating body of a FinFET on an SOI substrate stores charge, which is a function of the history of the device. As such, floating body FinFETs experience threshold voltages which are difficult to anticipate and control, and which vary in time. The body charge storage effects result in dynamic sub-Vt leakage and Vt mismatch among geometrically identical adjacent devices. FinFETs fabricated on bulk silicon substrates do not experience floating body effects, but they do experience greatly increased source/drain to substrate capacitance. Increased source-drain to substrate capacitance is a parasitic effect, which degrades performance (speed).
Therefore, there is a need for FinFET devices and methods of fabricating FinFET devices without floating body effects and with reduced parasitic capacitance.